Unity gain settling time of the two-stage CMOS operational amplifier

Author

Chung S. Ha

Date of Award

5-1992

Degree Type

Thesis

Degree Name

Master of Science

Major

Electrical Engineering

Major Professor

Jim Rochelle

Abstract

With the advancement of semiconductor technology, the semiconductor devices are rapidly becoming a viable source for control system study. Since the introduction of the semiconductor devices, the importance of transient settling time is becoming more evident as the demand for faster circuits arises. One factor that defines the transient settling time is precision. High precision requires a longer transient settling time; thus, hampering the speed of integrated circuits. A solution to this problem may be found in the relationship between precision and the settling time of integrated circuits; thus obtaining a minimum settling time. In this thesis study the integrated circuit happens to be a classical two-stage CMOS operational amplifier. With the help of system theory, a design methodology for obtaining minimum settling time is developed for the two-stage CMOS operational amplifier.

Recommended Citation

Ha, Chung S., "Unity gain settling time of the two-stage CMOS operational amplifier. " Master's Thesis, University of Tennessee, 1992.
https://trace.tennessee.edu/utk_gradthes/12128