Design and implementation of a Reed-Solomon encoder integrated circuit

Author

Aaron L. Lewis

Date of Award

5-1996

Degree Type

Thesis

Degree Name

Master of Science

Major

Electrical Engineering

Major Professor

Donald W. Bouldin

Committee Members

Daniel Koch, Peyman Dehkordi

Abstract

Today, integrated circuit (IC) chip designers have many alternatives avail-able in going from application requirements to physical mask layout of an application-specific integrated circuit (ASIC). Due to the abundance of choices, choosing the right design path becomes just as critical as the actual design layout, implemen-tation, and verification. Herein, various datapaths are explored. A productivity and design cost analysis of a Reed Solomon encoder ASIC is reported. Tangible and intangible results are compared and contrasted.

Recommended Citation

Lewis, Aaron L., "Design and implementation of a Reed-Solomon encoder integrated circuit. " Master's Thesis, University of Tennessee, 1996.
https://trace.tennessee.edu/utk_gradthes/10886