Masters Theses

Date of Award

12-2019

Degree Type

Thesis

Degree Name

Master of Science

Major

Electrical Engineering

Major Professor

Benjamin J. Blalock Dr.

Committee Members

Garrett Rose Dr., Nicole McFarlane Dr.

Abstract

A sub-threshold digital-to-analog converter (DAC) has been investigated to support an ultra-low power monolithic spectral analysis system based on G m -C biquadratic filter circuits with tunable center frequency and Q. The proposed DAC provides bias current to the G m -C circuits to tune filter characteristics. This thesis describes the DAC and difficulties associated with sub-threshold operation for a current-division based DAC architecture when pA-level resolution is needed. The proposed 12-bit current-mode DAC uses the MOSFET-only W-2W architecture and is designed for a 180-nm CMOS process. The DAC’s full- scale current is 100 nA and least significant bit (LSB) current is 25pA. The proposed DAC architecture is also segmented, having a 5-bit current steering unary DAC on the back-end to provide an additional current range from 100 nA to 500 nA. In addition to the challenge of fine current resolution, this research reviews device sizing considerations unique to sub-threshold current-mode DAC design.

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