Masters Theses

Date of Award

5-1989

Degree Type

Thesis

Degree Name

Master of Science

Major

Electrical Engineering

Major Professor

Donald W. Bouldin

Committee Members

Robert E. Bodenheimer, M. J. Roberts

Abstract

Multiple analog-to-digital converters (ADCs) operating at sampling rates up to 1 MHz yield data rates that surpass the throughput bandwidths of digital computers. Long-term acquisition of these data requires specialized magnetic tape recorders for data storage and later playback and analysis.

A programmable high-speed data acquisition subsystem has been designed and implemented to provide the properly conditioned data for the high-speed tape recorders. The subsystem controls the order and rate at which 16-bit data words are read from as many as four of five ADCs, a time code generator, and an internal 64-kbyte tape header memory. The data are multiplexed, formatted, and converted into 24-bit words for synchronous parallel transfer to a high-speed digital magnetic tape recorder at rates of up to 7.3 Mbytes/s. Control words and time stamps are placed periodically in the data stream to facilitate playback synchronization and dem\iltiplexing. A DEC PDP-11/73 minicomputer provides supervisory control. ADC initialization, operating parameters, and channel multiplexing sequence lists are transferred by the computer, using direct memory access (DMA), and multiplexed by the subsystem to a selected ADC. The subsystem provides each ADC with sampling trigger signals ranging from 10.24 to 900 kHz derived from three internal programmable crystal clock oscillators and frequency-divider circuitry.

Computer-aided testing examines the operational features of the subsystem. This software-based diagnostic program, which runs on the host, determines and calls attention to hardware malfunctions.

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