Masters Theses

Date of Award

5-1989

Degree Type

Thesis

Degree Name

Master of Science

Major

Electrical Engineering

Major Professor

Donald W. Bouldin

Committee Members

James M. Rochell, R. B.

Abstract

Advancements in integrated circuit design and fabrication have provided a means by which more reliable and maintainable electronic equipment can be manufactured with less design effort. An encoder counter (a device often used in machine process control) was designed, fabricated, and tested using these advanced technologies. This Application Specific Integrated Circuit (ASIC) design included a self-diagnosing semicustom controller chip, and two Programmable Logic Devices (PLD's). The semicustom chip was constructed with a schematic capture Computer Aided Design (CAD) program utilizing predefined logic devices (standard cells), and was fabricated through Metal Oxide Semiconductor Implementation Service (MOSIS). A hardware and software interface were also implemented for initial testing purposes. The entire design process was then evaluated with respect to the performance of the CAD tools, and to the reliability and maintainability of the encoder counter.

Reliability was enhanced by at least a factor of two over a more traditional approach using SSI and MSI parts since the increased integration of this ASIC design reduced both the total chip count and the complexity of the printed circuit board layout. The self-diagnosing circuitry improved maintainability by at least a factor of three over a design without such capability since, after a failure has occurred, less troubleshooting time will be required. The CAD tools proved to be effective in reducing the design effort since both the semicustom chip and the PLDs were fully simulated before a hardware commitment was made. However, two limitations, which have since been addressed, were imposed on this ASIC design. First, the semicustom chip had to be built exclusively with small scale circuits since more advanced devices were not yet incorporated in the standard cell library. Second, fundamental-mode sequential circuit techniques could not be utilized due to simulation constraints of the CAD software. Methods have recently been devised to accurately simulate circuits designed with such techniques.

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