The design of a priority event monitor for an interrupt-driven computer

Author

Kenneth Franklin Baker

Date of Award

5-1992

Degree Type

Thesis

Degree Name

Master of Science

Major

Electrical Engineering

Major Professor

Paul B. Crilly

Committee Members

Robert E. Bodenheimer, Donald W. Bouldin

Abstract

An interrupt-driven microprocessor operates using priority levels to indicate which of multiple interrupt sources is currently being serviced, with a wait state to indicate that no interrupts are active. By monitoring and timestamping priority level and wait state activity, an analysis tool for an interrupt-driven microprocessor can be implemented. This thesis describes the design of such a tool, the Priority Event Monitor, for the SOLO microprocessor, proprietary to IBM.

The Priority Event Monitor consists of a PS/2 Microchannel computer, hardware for observing priority activity on the SOLO processor, and a SCSI bus link between the PS/2 and the hardware. The Priority Event Monitor digital architecture and the decisions leading to that architecture are covered, and the hardware architecture is shown and described.

Recommended Citation

Baker, Kenneth Franklin, "The design of a priority event monitor for an interrupt-driven computer. " Master's Thesis, University of Tennessee, 1992.
https://trace.tennessee.edu/utk_gradthes/12166