Masters Theses

Date of Award

12-1996

Degree Type

Thesis

Degree Name

Master of Science

Major

Electrical Engineering

Major Professor

Asa O. Bishop Jr.

Committee Members

Tom Dunigan, William McClain

Abstract

Software for data communications in a large multi-node digital signal processing system (Beamformer) was designed and developed. The system hardware includes a high speed memory system that contains two vector processors, three Cray Research, Inc. (CRAY) Advanced Parallel Processors (APPs), and three Sun UNIX servers. High Performance Parallel Interface (HIPPI) links provide high speed communications paths between the APPs and Sun nodes. An Ethernet Local Area Network (LAN) is used for control message communications within the system and provides the links to external systems. The research included development of client server software to allow access to Sun disks by APP programs via HIPPI. The research also included tests to measure the actual HIPPI data transfer performance. The results of these tests are presented. A design using HIPPI and Ethernet was developed and implemented for the data communications within the Beamformer system and with external systems. The author developed a library of FORTRAN-callable C functions to access the HIPPI links from the CRAY APP programs and a key Sun program to receive spectral products from the APPs via the HIPPI interfaces. This program was tested and, along with the other communications code discussed, is working properly in the production environment.

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