Doctoral Dissertations

Date of Award

5-1992

Degree Type

Dissertation

Degree Name

Doctor of Philosophy

Major

Electrical Engineering

Major Professor

Don Bouldin

Committee Members

D. Koch, M. Pace, R. McConnel, K. Kirby

Abstract

The design of integrated circuits has evolved in the last few years to become a complex and diverse task. The designer deals with a problem that has multiple dimensions. Some of these dimensions are: area, time delay, power consumption, and design time. The designer's task is to find the optimum design within this multi-dimensional design space such that it can be achieved using the available resources.

Given a certain set of specifications, the designer is to select any of the available algorithms to achieve the required goals. Starting from a behavioral description of the problem, various software tools can synthesize a chip that per- forms a specific function. However, a more global level is needed to deal with the available algorithms on a higher level while still preserving the multi-dimensional perspective of the problem. This level is used to compare the possibility of implementing the various algorithms without the need of generating the physical layout.

This dissertation describes a methodology that is capable of evaluating algorithms on the highest level for VLSI design. A cost function that utilizes techniques from the management science area is proposed and is used to relate the various dimensions of the design space.

Several examples are introduced to show the strength of this methodology. A comparison between the direct implementation of the fast Fourier transform iv and a novel implementation of the distributed arithmetic Fourier transform is performed using the proposed cost function. Other examples that deal with high level design issues and the selection of a design from the highest level possible are also presented.

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