Date of Award
Master of Science
Benjamin J. Blalock
Leon M. Tolbert, Jeremy H. Holleman
An on-chip transformer-based digital isolator has been designed, fabricated, and tested. This isolation technique is designed to function between a low voltage microcontroller and a potentially high-voltage power control system. The isolator’s isolation capability is determined by two factors, the RMS blocking voltage strength and common-mode transient immunity. The integrated circuit solution is designed in a high-temperature capable SOI process.
The on-chip transformer size is minimized by utilizing high frequency voltage pulses. A small transformer and overall small chip footprint of the design are favorable for integration into a larger system. The isolator is a two chip solution, an isolated transmitter and receiver. The transformer’s primary and secondary coils are fabricated with chip metal interconnect. The transformer is located on the transmitter chip. The secondary coil of the transformer is electrically isolated from the transmitter circuitry by an insulating oxide layer and is wire bonded off the transmitter chip and onto the receiver chip.
The isolator chips have been fabricated and bonded directly to printed circuit boards. The isolator has been experimentally tested with an input frequency as high as 5 MHz, or 10 Mbps. The isolator functions up to 150°C. The isolation capability has been experimentally verified at 8 kV/μs common-mode rejection and at 700-V RMS voltage breakdown.
Fandrich, Cory Lynn, "An On-Chip Transformer-Based Digital Isolator System. " Master's Thesis, University of Tennessee, 2013.