The implementation of a pseudo real-time test system

This thesis presents the development of a microprocessor controlled automatic test system designed to evaluate the Arithmetic Board of a high speed digital processor. First, a structured development technique is used for project planning and task assignment. The high speed processor is examined to determine the system requirements, and the Arithmetic Board is studied to show its functions and its detailed characteristics. Next, each functional section of the unit-under-test is evaluated, and tests are designed to demonstrate functionality and error location. The limitations of the microprocessor system are considered, and an interface module is designed to implement a pseudo real-time test capability. The software is developed using structured programming techniques as the design methodology. The study shows that structured project development and programming techniques can be successfully used to minimize misdirection, and that there are few advantages to using a real-time or pseudo real-time approach to the testing of the Arithmetic Board assembly.