Masters Theses

Date of Award


Degree Type


Degree Name

Master of Science


Electrical Engineering

Major Professor

Benjamin J. Blalock

Committee Members

Syed K. Islam, M. N. Ericson


An essential element of most robust analog/mixed-signal systems is a stable and precise bandgap voltage reference (BGR). CMOS compatible BGR circuits are generally limited by variability in output drift over temperature due to process variations. In this work a CMOS BGR is developed that provides simple, digitally-controlled post-process (i.e., post fabrication) trimming. The trimming is achieved through MOSFET switches used to adjust a current gain factor for the thermal voltage referenced current within the BGR circuit. This current is proportional to absolute temperature (PTAT). The PTAT current is injected into a series connected resistor and diode to ultimately provide an output voltage. The output voltage's temperature coefficient is correlated to the current gain factor applied to the internally generated PTAT current. Thus, the BGR circuit's temperature coefficient (and therefore drift) is adjusted or tuned using a digital input word to control switch settings and therefore the PTAT current. By providing post-process trimming, chip-to-chip and wafer-to-wafter variations can be minimized through simple digitally controlled tuning. This trimming capability also extends the BGR to broad temperature range applications. A complete CMOS-compatible post-process trimmable BGR implementation is described and measurement results are provided. Design considerations to enhance the circuit's tolerance to radiation induced single-event transients are also addressed.

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