Date of Award

8-2007

Degree Type

Dissertation

Degree Name

Doctor of Philosophy

Major

Materials Science and Engineering

Major Professor

David C. Joy

Committee Members

Philip D. Rack, Joseph E. Spruiell, Anthony J. Pedraza

Abstract

Today’s semiconductor industry has been significantly changing in its techniques and processes for the fabrication of devices and accordingly, there has been dramatic increase in performance and a reduction in cost. To obtain still higher device performances and still further cost reduction, the dimensions of patterns in integrated circuits should be as small as possible and the 3-dimensional accuracy of multidimensional semiconductor structures should be also achieved as well. The manufacturing of smaller feature dimensions and 3-dimensional devices has been enabled by developments in lithography – the technology which transfers designed patterns onto the silicon wafer. Especially, electron beam lithography is widely adapted in the nano fabrication technology due to its ability to achieve nanometer-scale resolution. The aim of this work is to fabricate test devices by the electron beam lithography possesses and apply them to the test of electron optical systems.

In this thesis, we first develop methods to fabricate a high resolution nano scale Fresnel zone plate and 3-dimenstional stair case structure by E-beam lithography. To optimize the fabrication we optimized the lithographic process and the subsequent process steps accounted for proximity effects via a correction program and controlled pattern transfer through reactive ion etching (RIE). The completed devices were tested in a Scanning Electron Microscopy (SEM) and the accuracy of feature parameters were examined by Fast Fourier Transformation methods (FFT). Finally, the application of these structures to the calibration and testing of e-beam systems was explored.

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