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Characterization and Realization of High Switching-speed Capability of SiC Power Devices in Voltage Source Converter

Date Issued
August 1, 2015
Author(s)
Zhang, Zheyu  
Advisor(s)
Fred Wang
Additional Advisor(s)
Leon M. Tolbert
Benjamin J. Blalock
Suzanne M. Lenhart
Daniel J. Costinett
Permanent URI
https://trace.tennessee.edu/handle/20.500.14382/24651
Abstract

The emerging wide band-gap, silicon carbide (SiC) power devices greatly improve the switching performance due to their inherent fast switching capability. However, the high switching-speed performance makes their switching behavior become more susceptible to parasitics of the application circuit. In the end, unlike the excellent switching performance of SiC devices tested in manufacturer’ datasheets, the observed switching performance in actual power converters is almost always worse. This dissertation aims at characterization and realization of high switching-speed capability of SiC devices in one of the most widely used converter types, the voltage source converter (VSC).


To evaluate the fast dynamic characteristics of SiC devices with high fidelity, a methodology of switching performance characterization is summarized. The assessed switching loss is highly sensitive to V−I timing alignment and cross-talk. A practical method is proposed to cope with these issues for accurate switching loss evaluation.

Based on the methodology of switching performance characterization, limitations and impact factors of switching performance of SiC devices in VSC are explored. Cross-talk, turn-on overvoltage, and parasitics of inductive loads are identified as the “killer” impact factors.

To suppress cross-talk, intelligent gate drivers are designed to be capable of tuning the gate voltage and gate resistance during different switching transients for both devices in a phase-leg. The spurious gate voltage induced by cross-talk can be limited, leading to the improved switching performance with fast switching speed and low switching losses.

To mitigate the turn-on over-voltage and parasitic ringing, the placement of gate drivers, devices and power stage and layout design for SiC devices with TO package are proposed and implemented, enabling 30% power loop and common source inductance reduction.

To decouple the interaction between devices and inductive load, a dedicated auxiliary filter is introduced to reshape the inductive load’s high frequency impedance, allowing the switching behavior to become as excellent as that tested by the optimally-designed inductor.

In the end, a SiC based three-phase VSC fed motor drives are built by using the knowledge and techniques developed above. It shows that switching behaviors in VSC have nearly identical performance as that characterized in the optimally-designed switching test circuit.

Subjects

SiC

Switching Characteriz...

Intelligent Gate Driv...

Optimal Interconnecti...

Disciplines
Power and Energy
Degree
Doctor of Philosophy
Major
Electrical Engineering
Embargo Date
August 15, 2016
File(s)
Thumbnail Image
Name

Dissertation_v.8__submission_.pdf

Size

11.98 MB

Format

Adobe PDF

Checksum (MD5)

9916680874ad16fd6560329e908f8841

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