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  5. Development of diagnostic techniques and software for a parallel digital signal processing board
Details

Development of diagnostic techniques and software for a parallel digital signal processing board

Date Issued
May 1, 1995
Author(s)
Alford, William A.
Advisor(s)
Bruce W. Bomar
Permanent URI
https://trace.tennessee.edu/handle/20.500.14382/32289
Abstract

The C31 Numerical Processing Element (NPE) is a 160 Mflop parallel digital signal processing board that contains four Texas Instruments TMS320C31 digital signal processors (C31’s). This board was designed by UTSI and Sverdrup Technology for use in the Computer-Aided Dynamic Data Monitoring and Analysis System (CADDMAS). Each processor on the board has its own memory banks, as well as shared memory; a buffered communications port (commport); a high-speed RS-422 serial link; and an input only RS-232 serial link. Since large quantities of these complex boards are to be used in the CADDMAS, it was necessary to create methods for detecting and locating faults in newly produced boards or malfunctioning boards. When new boards arrive from the manufacturer, they must be checked to verify functionality. The complexity of the boards requires an automated verification procedure to check each memory bank and the commports. To solve this problem, a battery of diagnostic routines was designed and implemented. This thesis describes the development and testing of the diagnostic routines and discusses the results. The diagnostics can quickly and accurately locate simple hardware faults, such as open circuit and short circuit faults on RAM data, address, and control lines.

Degree
Master of Science
Major
Electrical Engineering
File(s)
Thumbnail Image
Name

Thesis95A4.pdf

Size

1.5 MB

Format

Unknown

Checksum (MD5)

47161b00edb176c8b2f0bd0e096e7fc9


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