Design for packagability : the impact of bonding and interconnect technologies on the performance of VLSI dies

Silicon-on-silicon multichip module (MCM) packaging is maturing rapidly. It offers the integrated circuit (IC) designer a new approach over the conventional packaged IC on the printed circuit board. The bare ICs can now be mounted and interconnected on a silicon substrate for superior system performance. In general, the performance at the system level is a function of the package and the die and can described as:

Performance_system = ƒ (Performance_package + Performance_die) This work looks into the impact of the packaging technology from an IC designer's point of view. This dissertation is focused exclusively on investigating the "Performance_die" term due to a change in packaging technology. As a proof of principle, two image processing chip-sets have been designed with the conventional wire-bond/PCB and flip-chip/MCM packaging in mind. This work demonstrates how the performance of the dies change as they are designed for wire-bond/PCB and flip-chip/MCM technologies. The impact of the bonding/substrate technologies (i.e. wire-bond/PCB and flip-chip/MCM) on the performance of dies are demonstrated quantitatively in the following areas:

- Power

- Size

- Testability

- Cost