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  5. A 3rd Generation Frequency Disturbance Recorder: A Secure, Low Cost Synchophasor Measurement Device
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A 3rd Generation Frequency Disturbance Recorder: A Secure, Low Cost Synchophasor Measurement Device

Date Issued
August 1, 2015
Author(s)
Culliss, Jerel Alan  
Advisor(s)
Yilu Liu
Additional Advisor(s)
Leon M. Tolbert
Wei Gao
Lee L. Riedinger
Permanent URI
https://trace.tennessee.edu/handle/20.500.14382/24618
Abstract

The Frequency Monitoring Network (FNET) is a wide-area phasor measurement system developed in 2003. It collects power system data using embedded devices known as Frequency Disturbance Recorders (FDRs) which are installed at distribution level voltages. These devices are single-phase synchrophasor measurement units which share a number of common attributes with their commercial counterparts.


Phasor measurements from FDRs across North America and other power grids around the world are transmitted over the Internet back to the FNET servers at the University of Tennessee. By analyzing the fluctuations in the grid’s frequency, FNET can identify disruptive events relating to the operation of the system as a whole. Fundamentally, the effectiveness of FNET correlates to the number of units and their placement within the power system. Therefore, an effective method of improving the FNET system is to increase the rate of FDR deployment. The Generation-2 FDRs are limited in this sense by their cost, configurability, and maintainability. This generation of Frequency Disturbance Recorders was developed in 2006 and there have only been incremental improvements to them over their lifetime.

With this in mind, this purpose of this research is to develop a new FDR design which addresses the limitations of the current device – cost, maintainability, and communication. These improvements will ultimately increase the capabilities of FNET as a whole. This will be accomplished by a design which utilizes a modern microcontroller and a full-featured operating system combined with a modular hardware scheme. The combination of these factors will reduce costs and increase device capability while also allowing for improved future expansion and maintainability of the system. Research and development for both the hardware and software of this FDR is presented, along with a finalized prototype working unit which interfaces with the existing FNET servers.

Subjects

FNET

Frequency Disturbance...

Synchrophasor

Embedded System

Disciplines
Power and Energy
Systems and Communications
VLSI and Circuits, Embedded and Hardware Systems
Degree
Doctor of Philosophy
Major
Electrical Engineering
Embargo Date
August 15, 2016
File(s)
Thumbnail Image
Name

0-PEM_Key_Server.txt

Size

2.97 KB

Format

Text

Checksum (MD5)

4c04c866d057a2e5d068a416eba61fe6

Thumbnail Image
Name

1-PEM_Key_FDR.txt

Size

2.97 KB

Format

Text

Checksum (MD5)

596b6bfcd5a8598c3c9051e59e742780


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