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  5. Application of fir digital interpolation filters to array beamforming using the TMS 32010 digital signal processor
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Application of fir digital interpolation filters to array beamforming using the TMS 32010 digital signal processor

Date Issued
December 1, 1985
Author(s)
Lane, Kenneth Gregory
Advisor(s)
Bruce W. Bomar
Additional Advisor(s)
Roy Joseph
Ron Belz
Permanent URI
https://trace.tennessee.edu/handle/20.500.14382/35653
Abstract

Digital beamformers are commonly used in SONAR systems to electronically point an acoustic array in a particular receiving direction. It is desirable to sample the array sensors only slightly above the Nyquist rate to reduce Analog to Digital (A/D) converter and telemetry cost. However to attain a sufficient number of pointing directions or beams a sample rate much larger than the Nyquist rate is required. Digital interpolation techniques can be employed to effectively increase the data sample rate for beamforming while maintaining the Nyquist rate at the array sensors. This is particularly advantageous where the array is at a significant distance from the beamformer. In this case the A/D conversion circuitry and telemetry costs can be greatly reduced.


In this thesis the feasibility of using modern Very Large Scale Integrated (VLSI) digital signal processors for interpolation beamforming is examined. Typical requirements for a passive Sound Operated Navigation And Ranging (SONAR) system are assumed and a Finite Impulse Response (FIR) interpolation beamformer is designed for this case. The computational efficiency of the beamformer is optimized by using a polyphase structure to realize the beamformer FIR filter and by recognizing and avoiding the calculation of any interpolated sensor samples which are not needed. Next, a VLSI digital signal processor suited to implementing the beamformer is selected. As much of the beamformer processing load as possible, within constraints on processor memory and processing speed, is implemented on one of the selected processors. A study of the results of this implementation is then used to find that the total number of signal processors required for the full beamformer is only two. Therefore, the use of VLSI signal processors for beamforming is found to be a cost effective approach. Finally, to place the results of this thesis in perspective, the increase in beamformer complexity with reduced interpolation error is examined and the performance of the FIR interpolation beamformer is compared with that of simpler linear interpolation (two point FIR) and conventional (non-interpolation) beamformers.

Degree
Master of Science
Major
Electrical Engineering
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Thesis85L346.pdf

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2.94 MB

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Unknown

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fd63fe39ba1796c1c2e8b9435358c939


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