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  5. Design and measurement of a six-bit CMOS digital-to-analog converter
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Design and measurement of a six-bit CMOS digital-to-analog converter

Date Issued
August 1, 1994
Author(s)
Horner, Rita Najmi
Advisor(s)
Donald W. Bouldin
Additional Advisor(s)
J.M. Rochelle
William McClain
Permanent URI
https://trace.tennessee.edu/handle/20.500.14382/32873
Abstract

A six-bit current steering digital-to-analog converter (DAC), integrated in a double-metal, single poly 2 µm standard n-well CMOS technology in the MOSIS process, is described. Current source matching and differential switch driving aspects are considered. Experimental results confirmed the theoretical predictions and show that the DAC is monotonic with DC differential and integral non-linearity of less than ±1LSB over an input current range of 28 to 130 µA and output voltage range of 1 to 5 V; the non-linearity is greater than ±1LSB for currents above 130µA. The DAC is 298×1079 µ2 in area.

Degree
Master of Science
Major
Electrical Engineering
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Thesis94H67.pdf

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4.89 MB

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Unknown

Checksum (MD5)

eb71b3962bb861867d3d1a74a90e1fd3


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