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Design of High Power Density Three-Level Inverter for Aircraft Application

Date Issued
December 1, 2019
Author(s)
Chen, Ruirui
Advisor(s)
Fred Wang
Additional Advisor(s)
Leon Tolbert
Daniel Costinett
Xueping Li
Permanent URI
https://trace.tennessee.edu/handle/20.500.14382/27187
Abstract

For more electric transportation applications, power density of the power electronic converters becomes the key issue because of the limited space and carrier capability. This dissertation studies three-level converter in aircraft application. The research focuses on design of high power density three-level inverter emphasizing on passive reduction through novel modulation and control, paralleling and interleaving strategy, filter modeling and design optimization.First, understanding harmonic characteristics in a power converter is critical for passive design and reduction. Harmonic calculation models of three-level neutral point clamped inverter with space vector modulation are developed. The impact of interleaving angle on dc and ac side harmonics and EMI harmonics is comprehensively studied considering multiple impact factors and optimal interleaving angle ranges to reduce these harmonics is derived.Second, low frequency circulating currents need to be suppressed in paralleled inverters. To increase inverter system power density, a space vector modulation is proposed for paralleled three-level inverters to reduce common-mode voltage and switching loss in addition to suppress the low frequency circulating current.Third, high frequency circulating currents are suppressed by coupled inductors in parallel interleaved inverters. To reduce the coupled inductor size and weight, carrier based PWM method to achieve minimum flux for coupled inductor in interleaved three-level inverters is proposed. Fourth, to reduce the required EMI filter, one approach is reducing EMI noise. The inverter and filter topology for common-mode noise reduction in three-level inverter is investigated. Fourth-leg topology is applied to three-level inverter for common-mode noise reduction. An impedance balancing circuit filter topology is proposed to reduce both dc and ac side common-mode noise for motor drive system.Fifth, to reduce the required EMI filter, another approach is filter design optimization. Spectrum concept is introduced for CM inductor saturation analysis and design optimization. CM inductor flux density model is developed and multiple impact factors are investigated. An improved CM filter design procedure is proposed to avoid over-design or under-design of CM inductor.Last, design and demonstration of a 1 MW three-level inverter with cryogenic cooling is presented which provides guidance for high power three-level inverter design and cryogenic power converter design.

Degree
Doctor of Philosophy
Major
Electrical Engineering
Embargo Date
May 15, 2021
File(s)
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utk.ir.td_13074.pdf

Size

24.35 MB

Format

Adobe PDF

Checksum (MD5)

2c7ddef78ac94df53d0f8724f4c8ddba

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