A development environment for reconfigurable computing

Reconfigurable Computing is a cutting-edge technology used in VLSI and FPGA design and it refers to a system that contains hardware whose functional- ity can be changed many times. In this thesis, the author establishes a complete set of design paths to do reconfigurable computing using the Engineers' Virtual Computer (EVC); proves established methods; and develops both hardware and software designs to evaluate differences in execution time between them. This is done by running hardware designs on the EVC and simultaneously executing soft- ware equivalent designs on a Sun Sparc 10 station. The hardware and software designs are developed using VHDL, a hardware description language, and the programming language C, respectively. By using COSSAP, a DSP CAD toolset, VHDL and C code are generated from the application's block diagram level. The designs are then synthesized using Synopsys FPGA Compiler with Xilinx 4000 FPGA technology. Xilinx XACT tools are used to perform the physical place and route for a Xilinx 4010 device. The result quantitatively determines that recon- figurable hardware using FPGAs is capable of providing a significant performance improvement over the Sun Sparc 10 processor for DSP applications.