Tiled DANNA: Dynamic Adaptive Neural Network Array Scaled Across Multiple Chips

Tiled Dynamic Adaptive Neural Network Array(Tiled DANNA) is a recurrent spiking neural network structure composed of programmable biologically inspired neurons and synapses that scales across multiple FPGA chips. Fire events that occur on and within DANNA initiate spiking behaviors in the programmable elements allowing DANNA to hold memory through the synaptic charge propagation and neuronal charge accumulation. DANNA is a fully digital neuromorphic computing structure based on the NIDA architecture. To support initial prototyping and testing of the Tiled DANNA, multiple Xilinx Virtex 7 690Ts were leveraged. The primary goal of Tiled DANNA is to support scaling of DANNA neural networks beyond the constraints of a single chip or subsystem. To date, the largest physical DANNA implementations have been limited to a single FPGA chip. By synchronizing the neural network activity occurring within DANNA across multiple chips and designing a custom communication interface, DANNA has efficient and continuous scalability. This is accomplished by partitioning DANNA networks across interconnected tiles of DANNA elements in a two dimensional grid and then transmitting fire events over the chip boundaries. This report provides a brief history of neuromorphic computing, the progression of DANNA development, and a discussion over the design and implementation of Tiled DANNA.