Design and implementation of a Reed-Solomon encoder integrated circuit

Today, integrated circuit (IC) chip designers have many alternatives avail-able in going from application requirements to physical mask layout of an application-specific integrated circuit (ASIC). Due to the abundance of choices, choosing the right design path becomes just as critical as the actual design layout, implemen-tation, and verification. Herein, various datapaths are explored. A productivity and design cost analysis of a Reed Solomon encoder ASIC is reported. Tangible and intangible results are compared and contrasted.