Early analysis of VLSI systems with packaging considerations

There is an explosive growth in the size of the VLSI (Very Large Scale Integration) systems today. Microelectronic system designers are packing millions of transistors in a single IC chip. Packaging techniques like Multi-chip module (MCM) and flip-chip bonding offer faster interconnects and IC's capable of accommodating a larger number of inputs and outputs. The complexity of today's designs and the availability of advanced packaging techniques call for an early analysis of the system based on estimation of system parameters to select from a wide choice of circuit partitioning, architecture alternatives and packaging options which give the best cost/performance.

A procedure for the early analysis of VLSI systems under packaging considerations has been developed and implemented in this dissertation work. The early analysis tool was used to evaluate the inter-relationship between partitioning and packaging and to determine the best system design considering cost, size and delays. The functional unit level description of a 750,000-transistor MicroSparc processor was studied using an exhaustive search technique. The early analysis performed on the MicroSparc design suggested that the three chip multi-chip design using flip-chip IC's interconnected on a MCM-D substrate is the most cost effective. An early bond pitch analysis performed using the tool concluded that a 250-micron bond pitch is the best choice for the multi-chip MicroSparc designs. The tool was also used to perform an early cache analysis which showed that the use of separate memory and logic processes made it feasible to design the MicroSparc design with larger cache sizes than the use of a combined logic and memory process. The designs based on the separate processes gave equivalent or better performance than the design candidates with smaller cache sizes. Future extensions of the procedure are also outlined here.