Analysis and design of a high voltage amplifier to drive capacitive loads
An amplifier capable of driving a capacitive transducer (~500 pF) up to 300 V and 150 kHz was designed and implemented. Design equations describing the frequency response, the transient response, input impedance, output impedance and power dissipation have been presented. The results from these design equations are compared with the experimental results and SPICE computer simulation results.
The driver amplifier shown in this thesis has a worst case rise time of ~0.9 μs. As signal level decreases the rise time also decreases. The bandwidth of the driver amplifier is —700 kHz at low signal levels and decreases to about 450 kHz at high signal levels. The slew rate is calculated to be —1180 V/μs and at worst case conditions the pulse response showed no slewing indicating a slew rate >600 V/μs. Good correlation was observed between the hand analysis, SPICE analysis and experimental results.
Thesis85B233.pdf
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