Hardware Implementation of the PET Backprojection Algorithm using FPGA Technology

Backprojection is used in the recovery of 2D and 3D images in positron emission tomography (PET). PET is used by medical personnel in the detection and location of growths or tumors that lie within the human body. Current image reconstruction using the Backprojection algorithm requires a great deal of processing time to complete. The general method used to decrease processing time is a multi-processor system with each processor working on a portion of the final image to be reconstructed. This thesis will focus on implementing the Backprojection algorithm utilizing a hardware platform. The Wildcard PCMCIA card, which contains a Virtex 300 FPGA, will be the focus of this effort. The goals of this thesis are to test the validity of using a FPGA to perform lengthy, numerical algorithms, in this case the PET backprojection algorithm, a task that has primarily been left to processors, and to compare the relative speed and accuracy of using the FPGA versus using a processor. The algorithm will be written for and tested by reconstructing a 128x128 2D PET image from sinogram data provided by CTI.