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  5. Development of an FPGA-Based Hardware Evaluation System for Use with GA-Designed Artificial Neural Networks
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Development of an FPGA-Based Hardware Evaluation System for Use with GA-Designed Artificial Neural Networks

Date Issued
August 1, 2004
Author(s)
Earl, Dennis Duncan
Advisor(s)
Donald Wayne Bouldin
Additional Advisor(s)
Mongi Abidi
Seong-Gon Kong
Bruce MacLennan
Permanent URI
https://trace.tennessee.edu/handle/20.500.14382/23169
Abstract

The Hardware-Evolved Digital Artificial Neural Network (HEDANN) design platform is a circuit design platform built to evolve complex architecture ANN circuits using re-configurable hardware. By using genetic algorithms to evolve complex architecture ANN designs in field programmable gate arrays, this system is the first design system to evolve physical ANN circuits with unconstrained network architectures. With the HEDANN design system, the evolution of ANNs with recursive, non-layered, complex architectural connections is made possible. In addition, the HEDANN design system is capable of evolving device-independent circuit designs that can operate properly across a wide range of operating temperatures. This system is presented as a powerful new tool for researchers working to develop both artificially intelligent systems and complex evolvable hardware. To demonstrate the potential benefits of this unique design platform, the details of two trial experiments are presented and the results discussed.

Disciplines
Electrical and Computer Engineering
Degree
Doctor of Philosophy
Major
Electrical Engineering
Embargo Date
August 1, 2004
File(s)
Thumbnail Image
Name

EarlDennisDuncan.pdf

Size

2.07 MB

Format

Adobe PDF

Checksum (MD5)

9efadf88c74c1b1e73d437cc254d9fb8

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