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  5. Diagnostics of VLSI floating-point processors
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Diagnostics of VLSI floating-point processors

Date Issued
August 1, 1984
Author(s)
Trivedi, Mrugesh Popatlal
Advisor(s)
Donald W. Bouldin
Additional Advisor(s)
Robert Bodenheimer, Robert Rochelle
Abstract

The purpose of this project was to develop a strategy for testing the 32-bit operation of three types of single-chip floating-point processors (adder/subtracter, multiplier and divider) and subsequently to implement a procedure successfully.


The primary design goal was to build a testing circuit with minimum external hardware so as to minimize the sources of errors and to enable the user to pinpoint the faulty chip immediately. The second goal was to keep the test hook-up small and handy, so that the user can carry out the testing easily.

The test hook-up developed employs the TM 990/U89 microcomputer from Texas Instruments, an interfacing circuit with SN74S373 latches, and a floating-point chip. Uniformly distributed random test data are applied to the input of a chip and the output obtained is compared with the desired values to verify the operation of the chip.

Degree
Master of Science
Major
Electrical Engineering
File(s)
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Thesis84.T759.pdf_AWSAccessKeyId_AKIAYVUS7KB2IXSYB4XB_Signature__2FGWy2nKiO88NkBL5EXVeZ3cA8F4_3D_Expires_1760896568

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6.94 MB

Format

Unknown

Checksum (MD5)

a693a5d43b41e8d4e7729a2389b2ebb0

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