Date of Award
Master of Science
Syed K. Islam
Benjamin J. Blalock, M. Nance Ericson
The demand for low power, low cost, and low noise RF sub-systems has lead to the development of completely integrated transceivers. Frequency synthesizers containing a PLL and a crystal oscillator are perhaps the most challenging part of a transceiver’s design. One of its nosiest, most power consuming components, the VCO, often makes the PLL a challenging design. For an LC-VCO, the best type of VCO for quality noise performance, the struggle lies in the fully integrated inductor. Despite the vast improvement in additional facets of the LC-VCO, the integrated inductor lags in its accomplishments; and the focus of designers is to work around the inductor’s low quality factor. This research analyzes the LC-VCO and different means of compensating for design parameters hindered by a low-quality integrated inductor. It tests an LC-VCO developed in a 0.35 μm CMOS, 3.3V process and also designs an LC-VCO in a 0.18 μm CMOS, 1.8V process. The VCO design has a center frequency of 2.4 GHz. Also, its components and topology are scrutinized, while its performance is analyzed and verified through simulation results.
Williamson, Bryant Derand, "A 2.4 GHz LC-VCO Using On-Chip Inductors and Accumulation-Mode Varactors in a CMOS 0.18 μm Process. " Master's Thesis, University of Tennessee, 2005.