Masters Theses

Date of Award

8-2006

Degree Type

Thesis

Degree Name

Master of Science

Major

Electrical Engineering

Major Professor

Benjamin J. Blalock

Committee Members

Charles L. Britton, Jr., Syed K. Islam

Abstract

This thesis presents the design and implementation of a low noise CMOS charge sensitive preamplifier with pole/zero compensation for a neutron detector to be installed on the Spallation Neutron Source in Oak Ridge, TN. The first prototype chip has been fabricated using Taiwan Semiconductor Manufacturing Company (TSMC) 0.35 µm process. The system contains a preamplifier, an active resistive feedback network, a pole/zero compensation network, and the first real pole input to the shaper system. Experimental results of the system show that proper functionality was achieved. The preamplifier is noise dominant with only 540 rms electron noise at 5 pF detector capacitance and can be used with either a positive or negative input charge signal. The active resistive feedback network uses an on chip nanoampere current source for biasing and a 4-bit D/A converter for user selectable feedback resistance and detector leakage current compensation up to 15 nA. The pole/zero compensation network actively tracks the feedback network for automatic compensation. The first real pole sets the first time constant for the shaper system.

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